isolated sigma-delta modulator preliminary technical data ad7400/ad7401 features up t o 20 mh z da ta r a t e ( ad7 401) 10 mhz da ta r a t e ( a d74 00) 2 nd o r der mod u la t o r 4 lsb in l @ 16 bits o n b o ar d digital isola t or o n boar d ref e renc e l o w p o w e r oper a t ion: 15 ma @ 5 v -40 c t o +10 5 c o p er a t ing r a nge 16-ld soic p a c k age s a f e t y and regula t o r y a p pr ov als ul rec o gnition 3750 v rms f o r 1 minut e per ul 1577 c s a c o m p o n e n t acce p t a n ce n o t i ce ~ 5 a vde c e r t ific a t e of c o nf ormit y din e n 60 747- 5-2 ( vde 0884 p a r t 2): 2003 -0 1 din e n 60 950 ( vde 0 805): 200 1-12; e n 6 0950 :2000 v ior m = 840v pea k applic a t ions ac m o t o r c o n t r o l da ta a c q u isitio n s y st ems a/d + o p to -iso la to r replac em ent general description the ad7400/ad7401 a r e 2nd o r der sig m a-de l t a m o d u la t o rs t h a t con v er t an a n a l og in p u t sig n a l in t o a hig h sp e e d 1 - b i t d a t a st r e a m wi t h on b o a r d d i g i t a l i s ola t ion b a s e d on ana l o g d e vic e s i co u p l e r ? t e c h nolog y . th e ad7 400/ad7401 o p era t e f r o m a 5 v p o w e r s u p p l y a nd accep t a dif f er en tia l in p u t sig n al o f 200 mv . the a n a l og in pu t is co n t i n uo usly s a m p le d b y t h e ana l og m o d u l a t o r , e l im ina t i n g t h e n e e d fo r ext e r n a l s a m p le an d h o ld cir c ui t r y . th e i n p u t info r m a t ion is co n t a i ne d i n t h e o u t p ut s t r e a m as a densi t y o f o n es wi th da t a ra t e s u p to 20mh z . th e o r ig ina l info r m a t io n can b e r e c o n s t r uc t e d wi t h a n a p p r o p r i a t e dig i t a l f i l t er . the s e r i al i/o ma y us e a 5v o r 3v s u p p l y (v dd 2 ). the s e r i a l in ter f ace is dig i t a l l y is ola t e d . h i g h -sp e e d cmos, func tio n a l block di agram update encode decode watchdog t/h v dd1 - ? adc mclkout* control logic mdat gnd 1 v dd2 gnd 2 v in + v in - ref buf update encode decode watchdog * m clkin pin on ad7401 rev. pr j in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . specifications subjec t to chan g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the proper ty of th eir respectiv e co mpan ies. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 w w w . a n a l o g . c o m fax: 781. 326. 87 03 ? 2004 analog de vices, i n c. al l r i ght s r e ser v ed .
ad7400/ad7401 preliminary technical data c o mb i n e d w i t h mo no l i t h i c ai r c o re t r ans f or me r te ch no l o g y , me ans t h e o n b o ard i s o l a t i o n prov i d e s out s t a nd i n g p e r f or m a nc e c h a r ac t e r i s t ics su p e r i o r t o al t e r n a t i v es s u c h as o p t o co u p ler de vices. th e p a r t s p r o v ide a n on-c hi p 2.5v r e f e r e n c e . th e ad740 0/ ad7401 a r e o f fer e d in a 16-le ad so i c p a cka g e an d ha v e a n o p er a t in g t e m p er a t ur e ra n g e o f -40c t o +1 05c. table of conte n ts ad7400s p ecif ica t io n s .................................................................. 3 ad7401s p ecif ica t io n s .................................................................. 4 t i m i ng sp e c i f ic a t io n s 1 ..................................................... 5 ab s o l u t e m a x i m u m r a t i n g s 1,3 ......................................................... 6 p i n f u n c t i onal d e s c r i p t io n s ........................................................8 the o r y o f o p era t io n . ....................................................................9 o u t l in e dim e n s io n s ....................................................................... 10 revision history r e vision p r j: p r e l imina r y v e rsi o n r e v. prj | pa ge 2 o f 10
preliminary technical data ad7400/ad7401 ad7400specifications 1 table 1. ( v dd 1 = v dd 2 = 4.5v to 5.5v, , v in + = - 2 0 0 m v to +2 00 mv a n d v in - = 0v; t a = t mi n to t max , f mc l k = 10m hz u n less otherwise no ted.) p a r a m e t e r b version 1 , 5 u n i t s t e s t condition s / c o m m e n t s static perfor m ance when tested with sinc 3 filter 4 resolution 16 bits min filter output tru n cated to 16 bit s integral nonlinearity 2 4 l s b m a x differential non l inearity 2 0.9 lsb max guaranteed no m i ssed cod e s to 15 bits offset error 2 0.5 mv max bipolar input range offset drift vs. temperature 2 5 2 v/ c max v/ c typ offset drift vs. v dd1 2 0 . 0 5 m v / v t y p absolute reference voltage t o l e rance 1 %min/ma x v ref drift vs. te mperature 2 6 0 ppm/ c typ v ref drift vs. v dd1 2 0 . 2 % t y p analog in put input voltage r a nge 200 mv min/max for specified pe rformance. full range 320mv. dc leakage current 1 a max dynamic s peci f ications when tested with sinc 3 filter 4 signal to noise + distortion ratio (sinad) 2 70 76 dbmin db typ v in + = 21hz, 400 mv pk-pk sine wa v e t o tal harmonic distortion (t hd) 2 - 8 0 d b t y p peak harmonic or spurious noise (sfdr) 2 - 8 0 d b t y p effective number of bits 12 bits isolation transie n t immunity 15 20 kv/s min kv/ s typ signal delay 20 24 s typ s max delay through filter varies with actual value of on- board clock. de cimation by 256. l o g i c o u t p u t s output high vol t age, v oh v dd2 C 0.1 v min i o = -20 a output low voltage, v ol 0 . 4 v m a x i o = 20 a power requir emen t s v dd1 +4.5/+5.5 vmin/vmax v dd2 + 4 . 5 / + 5 . 5 v m i n / v m a x + 2 . 7 / + 3 . 3 v m i n / v m a x i dd1 7 1 8 m a m a x v dd1 = 5.5v i dd2 7 5 m a m a x v dd2 = 5.5v notes 1 tem p era t ure ra n g es a s fo llow s : - 4 0 c t o +105 c 2 se e te rmin ology s e ct ion . 3 sa m p le t e st ed @ 2 5 c t o en su re c o m p li a n ce. 4 fi lt er a s d e fi n e d b y veri log c o de . 5 al l vo lt a g es a r e rel a t i ve t o t h e i r resp e c t i ve groun d. s p e c if icatio ns s u bj e c t to change witho ut no tice . r e v. prj | pa ge 3 o f 10
ad7400/ad7401 preliminary technical data ad7401specifications 3 table 2. ( v dd 1 = v dd 2 = 4.5v to 5.5v, , v in + = - 2 0 0 m v to +2 00 mv a n d v in - = 0v; t a = t mi n to t max , f mc l k = 20m hz u n less otherwise no ted.) p a r a m e t e r b version 1 , 5 u n i t s t e s t condition s / c o m m e n t s static perfor m ance when tested with sinc 3 filter 4 resolution 16 bits min filter output tru n cated to 16 bit s integral nonlinearity 2 4 l s b m a x differential non l inearity 2 0.9 lsb max guaranteed no m i ssed cod e s to 15 bits offset error 2 0.5 mv max bipolar input range offset drift vs. temperature 2 5 2 v/ c max v/ c typ offset drift vs. v dd1 2 0 . 0 5 m v / v t y p absolute reference voltage t o l e rance 1 %min/ma x v ref drift vs. te mperature 2 6 0 ppm/ c typ v ref drift vs. v dd1 2 0 . 2 % t y p analog in put input voltage r a nge 200 mv min/max for specified pe rformance. full range 320mv. dc leakage current 1 a max dynamic s peci f ications when tested with sinc 3 filter 4 signal to noise + distortion ratio (sinad) 4 70 76 dbmin db typ v in + = 21hz, 400 mv pk-pk sine wa v e t o tal harmonic distortion (t hd) 2 - 8 0 d b t y p peak harmonic or spurious noise (sfdr) 2 - 8 0 d b t y p effective number of bits 12 bits isolation transie n t immunity 15 20 kv/s min kv/ s typ signal delay 10 12 s typ s max delay through filter varies wi th actual value of external clock. decimati on by 256. l o g i c i n p u t s input high volt age, v inh 2 v m i n input low voltage, v inl 0 . 8 v m a x input current, i in 1 a m a x input capacitance, c in 3 1 0 p f m a x l o g i c o u t p u t s output high vol t age, v oh v dd2 C 0.1 v min i o = -20 a output low voltage, v ol 0 . 4 v m a x i o = 20 a power requir emen t s v dd1 +4.5/+5.5 vmin/vmax v dd2 + 4 . 5 / + 5 . 5 v m i n / v m a x + 2 . 7 / + 3 . 3 v m i n / v m a x i dd1 7 2 1 . 2 m a m a x v dd1 = 5.5v i dd2 7 3 . 9 2 m a m a x v dd1 = 5.5v, digital i/ps = 0 v or v dd1 notes 3 tem p era t ure ra n g es a s fo llow s : - 4 0 c t o +105 c 4 se e te rmin ology s e ct ion . 3 sa m p le t e st ed @ 2 5 c t o en su re c o m p li a n ce. 4 fi lt er a s d e fi n e d b y veri log c o de . 5 al l vo lt a g es a r e rel a t i ve t o t h e i r resp e c t i ve groun d. s p e c if icatio ns s u bj e c t to change witho ut no tice . r e v. prj | pa ge 4 o f 10
preliminary technical data ad7400/ad7401 timing s p ecific a t ions 1 t a b l e 3. ad74 00/ad7401 t i ming specif ic a t ions (v d d 1 = v d d 2 = 4.5v to 5.5v, t a = t ma to t mi n unle ss ot herwise not e d.) parameter limit at t min , t ma u n i t d e s c r i p t i o n f mclkout 1 0 m h z t y p a d 7 4 0 0 8 . 2 / 1 3 . 2 m h z m i n / m a x t mclkin 2 1 m h z m i n a d 7 4 0 1 20 m h z m a x t 1 3 30 ns max data access time after mclk ris i ng edge t 2 3 15 ns min data hold time after mclk rising edge t 3 0.4 x t mclkin ns max master clock low time t 4 0.4 x t mclkin ns max master clock high time notes 1 sa m p le t e st e d @ 25 c t o en su re c o m p li a n ce. a l l i n put si g n a ls a r e speci f i e d w i t h t r = t f = 5n s (10 % t o 90% of v dd1 ) and timed form a voltage le v e l of 1.6 volts. s ee figure 1. 2 mark space rat i o f o r t h e mcl kin input is 40/60 to 60/40. 3 mea s ur ed wi t h t h e l o a d ci rcui t of fi g ure 1 a n d d e fi n e d a s t h e t i m e r e q u i r ed for t h e out p ut t o c r oss 0.8v or 2.0v. +1.6v i ol 200a 200a i oh to output pin c l 50pf fi g u re 1 . l o a d c i rc uit f o r d i g i t a l o u t p ut t i min g s p e c if i c at i o n s mclkin / mclkout mdat t 1 t 2 t 3 t 4 f i g u r e 2. d a ta t i m i n g r e v. prj | pa ge 5 o f 10
ad7400/ad7401 preliminary technical data absolute maximum ratings 1,3 t a ble 4 . a d 74 00 /a d7 40 1 a b solute maximu m ratings (t a = +25c unles s o t h e r w is e n o t e d) v dd1 to gnd 1 -0.3 v to +6.5v v dd2 to gnd 2 -0.3 v to +6.5 v analog input voltage to gnd 1 -0.3 v to v dd1 +0.3v digital input voltage to gnd 2 -0.3 v to v dd2 +0.5 v output voltage to gnd 2 -0.3 v to v dd2 +0.3v input current to any pin except supplies 2 10ma operating tem p erature range -40c to +105c storage temperature range -65c to +150c junction tempe r ature +150c soic package ja thermal impedance 89.2 c/w jc thermal impedance 55.6 c/w resistance (inpu t -output), r i-o 10 12 ? capacitance (input-output), c i-o 1 p f lead temperature, soldering vapor phase (60 sec) +215c infared (1 5 sec) +220c e s d t b d notes 1 st resse s a b ov e t h o se li st e d un d e r abs o lut e ma xi m u m r a t i n gs m a y ca use permanent d amage to the d e vice. this is a s t ress rating onl y and f u nctional o p e r atio n o f the device at the s e o r any o the r co nd itio ns a b o v e tho se i n di ca t e d i n t h e op era t i o n a l sect i o n of this s p ecif ication is not impl i ed . expos ure t o a b s o lu t e m a x imum rating co nd itio ns fo r e x tend e d pe riod s may af f e ct d e vice rel iabil ity. 2 transient currents of up to 100m a will not cause scr latch up. 3 al l vo lt a g es a r e rel a t i ve t o t h e i r resp e c t i ve groun d. regulatory information (pen di ng) table 5. insulation and saf ety related s p ecifications p a r a m e t e r s y m b o l v a l u e u n i t s c o n d i t i o n s input - out p ut withst and momentary with st and v o lta g e 1 v iso 3750 min. v note 1 minimum external air gap (clearance) l ( i 0 1 ) 8 . 4 m i n m m measured from input terminals to output termin als, shortest distance through air. minimum external tracki ng (creepage) l ( i 0 2 ) 8 . 1 m i n m m meas ure d from i n put term inals t o ou tp ut t e rmi n a ls, shor test dis t ance path alo n g bo dy. minimum internal gap (internal clearan c e) 0.025 min mm insulation distance through insulation. t r acking resista n ce ( c o m p a r a t i v e track i ng in dex ) cti >175 v d i n i e c 1 1 2 / v d e 0 3 0 3 p a r t 1 isolation group iiia m a t e r i a l g r o u p ( d i n v d e 0 1 1 0 , 1 / 8 9 , t a b l e 1 ) ul 1 cs a vde 2 r e c o g n iz ed under 1577 c o mponen t r e cognition pr ogra m 1 d o uble insula tion, 3750 v r m s isola t ion v o ltag e approved under csa compone n t acceptance not i ce #5a reinforced insulation per csa 60950-1-03 and iec 60950- 1, 630 v rms maximum working v o ltage certified according to din e n 60 747-5-2 ( v d e 0884 p a r t 2):2003-01 2 basic insula tion, 891 v peak c o mplies with din en 60747-5 - 2 ( v de 0884 p a r t 2):200 3-01, din en 60950 ( v de 0805):2001-1 2 ; en 60950:200 0 r e inf o r c ed insula tion, 891 v peak no te s 1 i n ac c o r d anc e with ul1577, each ad74 00/ad7401 is pr oof t e st ed b y ap plying an insula ti on t e st v o ltage 4500 v r m s f o r 1 sec o nd ( c urr en t l e ak age d e t e c t i o n l imit = 10 a). 2 i n ac c o r d anc e with din en 60747-5-2, each ad7400/ad7401 is pr oof t e st ed b y ap plying an insula tion t e st v o ltage 1670 v peak f o r 1 s e c o n d (pa r t i a l di sc h a r g e d e t e c t ion l imit = 5 pc ) . r e v. prj | pa ge 6 o f 10
preliminary technical data ad7400/ad7401 din en 60747-5-2 ( v de 0 884 p a rt 2) in sul a tion char a c teristics (pending) t a bl e 6. description s y m b o l c h a r ac t e r i s t i c u n i t i n stalla ti on classifica tion per din vde 0 110 f o r r a ted m a ins v o ltage 300 v r m s f o r r a ted m a ins v o ltage 600 v r m s iCiv iCiii clima tic classifica tion 40/105/21 p o llution d e g r e e (din vde 0 110 , t a ble 1) 2 m a ximum w o r k ing i n sula tion v o ltage v ior m 891 vp e a k i n put t o o u tput t e st v o ltage , m e thod b1 v ior m 1.875 = v pr , 100% p r oduction t e st, t m = 1 sec , p a r t ial discharge < 5 pc v pr 167 0 v peak i n put t o o u tput t e st v o ltage , m e thod a af ter en vir o nme n tal t e sts subgroup 1) v ior m 1.6 = v pr , t m = 60 sec , p a r t ial disch a rge < 5p c a f ter i n put and/or saf e t y t e st subg r o up 2/3) v ior m 1.2 = v pr , t m = 60 sec , p a r t ial disch a rge < 5p c v pr 142 6 106 9 vp e a k vp e a k h i ghest allo w a ble o v er v o ltage ( t r a n s i e n t o v e r vo l t a g e, t tr = 10 sec) v tr 6 0 0 0 v p e a k saf e t y -limiting v a lues (m aximum v a lue allow e d in the e v e n t o f a f a i l u r e , a l s o s e e t h e r m a l de r a ti n g c u r v e ) c a se t e mpera tur e side 1 c u r r en t side 2 c u r r en t t s i s1 i s2 150 tbd tbd c ma ma i n sula tion r e sist anc e a t t s , v io = 500 v r s > 1 0 9 ? this is ol a t o r is sui t a b le fo r b asi c e l e c t r ica l is ola t io n o n ly wi t h i n t h e s a fety lim i t d a t a . m a i n t e n a n c e o f t h e s a fe ty d a t a sh all b e en s u r e d b y me a n s of prote c t i ve c i rc u i t s . ma rkin g o n p a c k a g es den o tes d i n en 607 47-5-2 a p p r o v al f o r 891 v p e ak w o rkin g v o l t a g e. r e v. prj | pa ge 7 o f 10
ad7400/ad7401 preliminary technical data 16 15 14 13 12 11 9 top view (no t t o sc al e) 8 1 2 3 4 7 6 5 a d 7400 nc v dd1 gnd 1 10 mda t nc v in + v in - nc nc gnd 2 gnd 2 nc mcl k out nc v dd2 v dd1 16 15 14 13 12 11 9 top view (no t t o sc al e) 8 1 2 3 4 7 6 5 a d 7401 nc v dd1 gnd 1 10 mda t nc v in + v in - nc nc gnd 2 gnd 2 nc m c lki n nc v dd2 v dd1 pin functi onal descr i ptions table 7. ad7400/ad 7 401 pin fu nction descriptions pin number ad74 00 pin mnemonic ad74 01 pin mnemonic description 1 , 7 v dd1 v dd1 supply voltage, 5 v 10%. this i s the su pply volt age for the isola t ed side of the ad7400/ad740 1 and is relative to gnd 1 . 2 v in + v in + positive analog i n put, range of 200 mv . 3 v in - v in - negative analog input (normally connected to gnd 1 ). 1 1 m d a t m d a t serial data output. the single bi t modulator out p ut is supplied to this pin as a s e rial data stream. t h e bits are cloc ked out on the ri sing edge of the mclki n /mclkout input. 1 3 m c l k i n master clock. logic input. an ex ternal c l ock i s ap plied at this pin. a serial clo c k in put from 1mhz to 20mhz may be applie d to this pin on the ad7401. the b i t stream form the modultaor is valid on the rising edge of mclkin . 1 3 m c l k o u t master clock. logic output, 10m hz typical. the bit stream form the modultaor is valid on the rising edge of mclkout on the ad7400. 1 4 v dd2 v dd2 supply voltage, 5 v 10% or 3v 10%. this is the supply voltag e for the non-isolated side of the ad7400/ad 7401 and is relative to gnd 2 . 8 g n d 1 gnd 1 ground. this is the ground reference poi nt fo r all circuitry on the isolated side of the ad7400/ad740 1. 9 , 1 6 g n d 2 gnd 2 ground. this is the ground reference poi nt for all circuitry on the non- is olated si de of the ad7400/ad740 1. 4 - 6 , 1 0 , 1 2 , 1 5 n c n c no c o n n e c t r e v. prj | pa ge 8 o f 10
preliminary technical data ad7400/ad7401 theory of op eration circuit informa t ion the ad7400/ad7401 i s ola t e d s i g m a-de l t a m o d u l a t o r con v er ts an an a l o g i n put s i g n a l i n to a h i g h - s p e e d , ( 1 0 m hz u s i n g on - bo a r d m c l k o n ad7400, o r u p t o 20mh z usin g ext e r n al m c lk o n ad7 401), sin g le-b i t da ta s t r e a m ; t h e time a v er a g e o f t h e mo d u l a tor s s i ng l e - b it d a t a i s d i re c t ly prop or t i on a l to t h e in p u t sig n a l . f i g u r e 4 sh o w s a ty p i ca l a p plic a t ion cir c ui t w h er e th e ad7400 /ad7401 is us ed to p r o v ide is ola t io n b e tween t h e a n a l og in p u t, a c u r r en t s e n s in g r e sist o r , a n d t h e dig i t a l ou t p u t w h ich is t h e n p r o c ess e d b y a dig i t a l f i l t er t o p r o v ide a n n- b i t word. mclkin v dd1 gnd 1 mdat v in + v in - gnd 2 mclkot v dd2 sigma- delta mod/ encoder decoder decoder encoder sinc 3 filter + isolated +5v r shnt inpt crrent non-isolated +5v/+3v v dd gnd mdat mclk cclk (p to 20mhz with ad7401) sdat sclk ad7400 f i g u r e 4. t y p i ca l a p pl ic a t io n c i r c u i t anal og inpu t the dif f er en t i al a n alog in p u t o f th e ad7400 /ad7401 is i m p l em en t e d w i th a swi t ch e d ca pa ci t o r ci r c ui t . t h i s ci r c ui t i m p l em en t s a 2 nd -o r d er m o d u la to r s t a g e w h ich dig i t i ze s t h e in p u t sig n a l i n to a 1-b i t o u t p u t st r e a m . th e s a m p le clo c k (mclk) p r o v ides t h e clo c k sig n al fo r t h e con v ersio n p r o c es s as w e l l as t h e o u t p u t da t a -f ra min g c l o c k. this c l o c k s o ur ce is in t e r n al on the ad7400 an d ex t e r n al o n the ad7401. i n t h e c a s e o f th e ad7401 dif f er en t c l o c k f r eq uen c ies al lo w f o r a va r i ety o f s o l u tio n s and sig n al ban d wid t hs o r fo r acc u ra t e syn c hr o n iza t ion o f s e v e ral ad74 01 de vices us e d in t h e s a m e sys t em. the a n a l og in pu t sig n a l is co n t in uo usly s a m p le d b y t h e mo d u l a tor a nd c o m p are d to an i n te r n a l volt age re fe re nc e. a dig i t a l s t r e am w h ich acc u ra t e l y r e p r es en ts t h e analog in p u t o v e r t i me a p p e a r s a t t h e o u t p ut o f t h e co n v er t e r . s e e f i gur e x. table 8. anal og input ran g e analog input voltage input f u l l s c ale r a n g e 640 mv +f u l l s c ale +320 mv + s p ecif ied i n p u t ra n g e +200 mv ze r o 0 m v -s p e cif i e d i n p u t ra n g e -200 mv -f u l l s c ale -320mv r e v. prj | pa ge 9 o f 10
ad7400/ad7401 preliminary technical data outline dimensions controlling dimensions are in millimeters inc dimensions in parenteses are rounded-off millimeter euialents for reference onl and are not appropriate for use in design compliant to edec standards ms-013aa seating plane 030 0011 010 0003 01 0001 031 001 01043 3 00 17 0000 bsc 1 1 10 0413 1000 0337 70 0 740 013 100 04134 1010 037 0 07 00 0 000 f i g u r e 2. 16- l e a d sh o r t ou t l in e p a c k a g e [so i c ] w i d e b o d y (r w - 16)di m en sio n s s h o w n in mi l l im et er s esd caution esd (electrostatic discharge) sensitive device. ele c trosta tic charg e s as high as 4000 v readily accumulate on the human body and test eq uipment and can discharge with out detection. although this product features proprietary esd protection circu i try, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. theref ore, prop er esd precautions a r e recommended to avoid perform a nce degradation or l o ss of functiona l ity. orderin g gu i d e ad72 66 prod ucts temperature p a ckage package descri ption package outlin e ad7400yrwz C40c to +105c short outline i.c. package rw-16 ad7400yrwz-r eel C40c to +105c shor t outline i.c. package rw-16 ad7400yrwz-r eel7 C40c to +105c sh ort outline i.c. package rw-16 ad7401yrwz C40c to +105c short outline i.c. package rw-16 ad7401yrwz-r eel C40c to +105c shor t outline i.c. package rw-16 ad7401yrwz-r eel7 C40c to +105c sh ort outline i.c. package rw-16 ? 2004 analo g de vices, inc. all rights reserve d . tra d em arks and registered tra d emar ks are the proper ty o f th eir respectiv e c o mpan ies . prin ted in th e u.s . a. r e v. prj | pa ge 10 o f 10
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